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preliminary MBF200 solid state fingerprint sensor applications secure access for databases, networks, local storage portable ?gerprint acquisition smart cards identity veri?ation for atm transactions cellular phone-based security access access control and monitoring (home, auto, of?e, etc.) packages overview the fujitsu MBF200 solid-state fingerprint sensor is a direct contact, ?gerprint acquisition device. it is a high performance, low power, low cost, capacitive sensor composed of a two- dimensional array of metal electrodes in the sensing array. each metal electrode acts as one plate of a capacitor and the contacting ?ger acts as the second plate. a passivation layer on the device surface forms the dielectric between these two plates. ridges and valleys on the ?ger yield varying capacitor values across the array, and the resulting varying discharge voltages are read to form an image of the ?gerprint. the MBF200 is manufactured in standard cmos technology. the 256 x 300 sensor array has a 50 ? pitch and yields a 500-dpi image. the sensor surface is protected by a patented, ultra-hard, abrasion and chemical resistant coating. features capacitive solid-state device 500-dpi resolution (50 ? pitch) 1.28 cm x 1.50 cm (0.5 x 0.6? sensor area 256 x 300 sensor array smart cards 3.3v to 5v operating range exceptionally hard protective coating integrated 8-bit analog to digital converter one of three bus interfaces: 8-bit microprocessor bus interface integrated usb full-speed interface integrated serial peripheral interface standard cmos technology low power, less than 70 mw operating at 5v automatic ?ger detection
preliminary MBF200 fujitsu microelectronics america, inc. -1 table of contents chip operation ................................................................................................................. ....................................................1 block diagram.................................................................................................................. ....................................................1 connection diagram............................................................................................................. .................................................2 pin list....................................................................................................................... .........................................................3 pin descriptions............................................................................................................... .....................................................4 device bus operation........................................................................................................... ..................................................7 microprocessor bus interface ................................................................................................... .........................................7 serial peripheral bus interface (spi) slave .................................................................................... ............................................8 spi bus mode................................................................................................................... ..............................................8 spi slave mode................................................................................................................. ..............................................8 register read command in spi slave mode ........................................................................................ ................................8 register write command for spi slave mode ...................................................................................... ................................8 usb interface mode, using internal rom ......................................................................................... .......................................8 endpoint 0 ..................................................................................................................... ...............................................8 endpoint 1 ..................................................................................................................... ...............................................8 endpoint 2 ..................................................................................................................... ...............................................8 usb interface mode, using external rom ......................................................................................... ......................................8 spi master mode ................................................................................................................ ............................................9 function register descriptions ................................................................................................. ..............................................9 function register map.......................................................................................................... .................................................9 rah 0x00 ....................................................................................................................... ..............................................9 ral 0x01....................................................................................................................... .............................................10 cal 0x02 ....................................................................................................................... .............................................10 reh 0x03....................................................................................................................... .............................................10 rel 0x04 ....................................................................................................................... .............................................10 cel 0x05 ....................................................................................................................... .............................................10 dtr 0x06....................................................................................................................... .............................................11 dcr 0x07....................................................................................................................... .............................................11 ctrla 0x08 ..................................................................................................................... ..........................................11 crtlb 0x09..................................................................................................................... ...........................................13 ctrlc 0x0a ..................................................................................................................... ..........................................14 sra 0x0b....................................................................................................................... .............................................14 pgc 0x0c ....................................................................................................................... ............................................15 icr 0x0d ....................................................................................................................... .............................................15 isr 0x0e ....................................................................................................................... ..............................................16 thr 0x0f ....................................................................................................................... ............................................16 fujitsu microelectronics america, inc.
preliminary solid state fingerprint sensor 0 fujitsu microelectronics america, inc. cidh 0x10 ...................................................................................................................... ........................................... 17 cidl 0x11 ...................................................................................................................... ............................................ 17 tst 0x12....................................................................................................................... ............................................. 17 sensor initialization.......................................................................................................... .................................................. 18 image retrieval ................................................................................................................ .................................................. 18 microprocessor interface ....................................................................................................... ........................................ 18 get row ........................................................................................................................ ....................................... 18 get whole image ................................................................................................................ ................................... 19 get sub-image .................................................................................................................. .................................... 20 serial peripheral interface .................................................................................................... .................................. 21 get image...................................................................................................................... ....................................... 21 usb interface.................................................................................................................. ...................................... 22 get image...................................................................................................................... ....................................... 22 absolute maximum ratings ....................................................................................................... .......................................... 23 operating range ................................................................................................................ ................................................ 23 dc characteristics ............................................................................................................. ................................................. 23 power supply consumption ....................................................................................................... .......................................... 24 ac characteristics ............................................................................................................. ................................................. 25 microprocessor bus mode........................................................................................................ ...................................... 25 read cycle ..................................................................................................................... ....................................... 25 write cycle .................................................................................................................... ....................................... 25 spi slave mode................................................................................................................. ..................................... 26 spi master..................................................................................................................... ....................................... 26 timing diagrams................................................................................................................ ................................................ 27 physical dimensions............................................................................................................ ................................................ 31 recommended land pattern....................................................................................................... .......................................... 32 array orientation.............................................................................................................. ................................................. 33 appendix a ..................................................................................................................... ................................................... 34 recommended power and ground connections ....................................................................................... ......................... 34 appendix b..................................................................................................................... ................................................... 35 recommended MBF200 sensor orientation .......................................................................................... ........................... 35 fujitsu microelectronics america, inc.
preliminary MBF200 fujitsu microelectronics america, inc. 1 block diagram 256 x 300 sensor array sample and hold function registers p0 p1 d[7:0] a0 rd wr cs0 cs1 mosi miso intr dp dm test xtal1 xtal2 extint xtal osc multi- vibrator index register data register ain iset fset analog spi usb control a/d converter mode1 mode0 wait chip operation the sensor array includes 256 columns and 300 rows of sensor plates. associated with each column are two sample-and-hold circuits. a ?gerprint image is sensed or captured one row at a time. this ?ow capture occurs in two phases. in the ?st phase, the sensor plates of the selected row are pre-charged to the vdd voltage. during this pre-charge period, an internal signal enables the ?st set of sample-and-hold circuits to store the pre-charged plate voltages of the row. in the second phase, the row of sensor plates is discharged with a current source. the rate at which a cell is discharged is proportional to the ?ischarge current. after a period of time (referred to as the ?ischarge time?, an internal signal enables the second set of sample-and-hold circuits to store the ?al plate voltages. the difference between the precharged and discharged plate voltages is a measure of the capacitance of a sensor cell. after the row capture, the cells within the row are ready to be digitized. the sensitivity of the chip is adjusted by changing the discharge current and discharge time. the nominal value of the current source is controlled by an external resistor connected between the iset pin and ground. the current source is controlled from the discharge current register (dcr). the discharge time is controlled by the discharge time register (dtr).
preliminary solid state fingerprint sensor 2 fujitsu microelectronics america, inc. connection diagram MBF200 vdda1 vssa1 iset ain fset vssa2 vdda2 test p0 p1 d7 d6 d5 d4 vss1 vdd1 d3 d2 d1 d0 a0 rd wr vss2 vdd2 xtal2 xtal1 intr wait extint cs1/sclk cs0/scs mosi miso mode1 mode0 dm dp vdd3 vss3 n/c 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 n/c n/c n/c n/c n/c n/c n/c n/c n/c n/c n/c n/c n/c n/c n/c n/c n/c n/c n/c n/c n/c n/c n/c n/c n/c n/c n/c n/c n/c n/c n/c n/c n/c n/c n/c n/c n/c n/c n/c
preliminary MBF200 fujitsu microelectronics america, inc. 3 pin list pin number name type iol (5.0 v) ioh (5.0 v) description 1 vdda1 pwr analog power supply 2 vssa gnd analog ground 3 iset o sets reference current 4 ain i analog input 5 fset o sets internal multi-vibrator frequency 6 vssa2 gnd analog ground 7 vdda2 pwr analog power supply 8 test i test mode enable 9 p0 o 8ma 4ma output port 0 10 p1 o 8ma 4ma output port 1 11 d7 i/o 8ma 4ma data bit 7 12 d6 i/o 8ma 4ma data bit 6 13 d5 i/o 8ma 4ma data bit 5 14 d4 i/o 8ma data bit 4 15 vss1 gnd digital ground 16 vdd1 pwr digital power supply 17 d3 i/o 8ma 4ma data bit 3 18 d2 i/o 8ma 4ma data bit 2 19 d1 i/o 8ma 4ma data bit 1 20 d0 i/o 8ma 4ma data bit 0 21 a0 i address input 22 rd i 8ma 4ma read enable, active low 23 wr i 8ma 4ma write enable, active low 24 vss2 gnd digital ground 25 vdd2 pwr digital power supply 26 xtal2 o internal oscillator output 27 xtal1 i internal oscillator input 28 intr o 8ma interrupt output, active low 29 w ait o 8ma wait, active low 30 extint i external interrupt input 31 cs1/sclk i/o chip select, active high 32 cs0 /scs i/o chip select, active low 33 mosi i/o 8ma 4ma spi master output / slave input 34 miso i/o 8ma 4ma spi master input / slave output 35 mode1 i mode select 1 36 mode0 i mode select 0 37 dm i/o usb d- 38 dp i/o usb d+ 39 vdd3 pwr digital power supply 40 vss3 gnd digital ground [41:80] n/c no connect
preliminary solid state fingerprint sensor 4 fujitsu microelectronics america, inc. pin descriptions vdda1, vdda2 (pins 1 and 7) power supply to the analog section of the sensor. vdda1 powers the array, row drivers, column receivers, a/d converter, and sam ple/hold ampli?r. vdda2 powers the multi-vibrator and bias circuits. vssa1, vssa2 (pins 2 and 6) ground for the analog section of the sensor. vssa1 is the ground return for the array, row drivers, column receivers, a/d conve rter, and sample hold ampli?r. vssa2 is the ground return for the multi-vibrator and bias circuits. vdd1, vdd2, vdd3 ( pins 25, 16, and 39) power supply to the digital logic and i/o drivers. vdd2 powers the core digital logic, oscillators, phase-locked loops, and dig ital inputs. vdd1 and vdd3 supply power to the digital output circuits and usb transceivers. vss1, vss2, vss3 (pins 24, 15, and 40) ground for the digital logic and i/o drivers. vss2 is the ground connection for the core digital logic, oscillators, phase-locked loops, and digital inputs. vss1 and vss3 ar e the ground connections for the digital outputs and usb transceivers. iset (pin 3) connect a 200k ohm resistor between iset and analog ground vssa1 to set the internal reference current. the discharge current i s a scalar function of the internal reference current. ain (pin 4) alternate analog input to the a/d converter. set the ainsel bit in register ctrla to select ain as the input to the a/d convert er. pull this pin to ground, preferably with a resistor. fset (pin 5) connect a resistor between fset and ground to set the internal multi-vibrator and automatic ?ger detection frequency. use a 56 k ohm resistor for standard 12 mhz (?0%) multi-vibrator operation and 120khz (?0%) automatic ?ger detection sampling rate. xtal1 (pin 27) input to the internal oscillator. to use the internal oscillator, connect a crystal circuit to this pin. if an external oscilla tor is used, connect its output to this pin. xtal2 (pin 26) output from the internal oscillator. to use the internal oscillator, connect a crystal circuit to this pin. if an external osci llator is used, leave this pin unconnected. d[7:0] (pins 11-14, 17-20) bi-directional data bus. d[7:0] have weak latches that hold the buss state when not being driven. these pins may be left uncon nected in spi or usb mode. a0 (pin 21) address input. drive a0 low to select the address index register. drive a0 high to select the data buffer. a0 has a weak latch that holds the pin state when not being driven. this pin may be left unconnected in spi or usb mode.
preliminary MBF200 fujitsu microelectronics america, inc. 5 rd (pin 22) read enable, active low. to read from the chip, drive rd low while wr is high and the chip is selected. rd has an internal, weak pull-up resistor and may be left unconnected in spi or usb mode. wr (pin 23) write enable, active low. to write to the chip, drive wr low while rd is high and the chip is selected. wr has an internal, weak pull-up resistor and may be left unconnected in spi or usb mode. cs0 / scs (pin 32) chip select, active low. the cs0 /scs pin has a weak latch that holds the pins state when not being driven. cs0 /scs may be left unconnected in usb mode if not using an external serial rom. the function of the cs0 /scs pin depends on the mode1 and mode0 pins. mode[1:0] = 00b (microprocessor bus interface mode) cs0 /scs functions as an active-low chip select input. drive cs0 /scs low while cs1 is high to select the chip. mode[1:0] = 01b (spi slave mode) cs0 /scs functions as an active-low slave chip select input. connect a pull-up resistor between cs0 /scs and vdd. mode[1:0] = 10b (usb interface mode, using internal rom) cs0 /scs has no function. mode[1:0] = 11b (usb interface mode, using external rom) cs0 /scs functions as the master chip select output, active low to the slave serial rom chip select. connect a pullup resistor between cs0 /scs and vdd. cs1 / sclk (pin 31) chip select, active high. the cs1/sclk pin has a weak latch that holds the pins state when not being driven. cs1/sclk may be l eft unconnected in usb mode if not using an external serial rom. the function of this pin depends on the mode1 and mode0 pins. mode[1:0] = 00b (microprocessor bus interface mode) cs1/sclk functions as an active-high chip select input. drive cs1/sclk high while cs0-/csc- is low to select the chip. mode[1:0] = 01b (spi slave mode) cs1/sclk functions as the slave serial clock input. mode[1:0] = 10b (usb interface mode, using internal rom) cs1/sclk has no function. mode[1:0] = 11b (usb interface mode, using external rom) cs1/sclk functions as the master serial clock output to the slave serial rom clock input. connect a pull-up resistor between cs1/sclk and vdd. extint (pin 30) external interrupt input. this pin can be programmed to be edge or level sensitive, active-high or active-low. extint has a wea k pull-up and may be left unconnected in mcu, spi, or usb mode. intr (pin 28) interrupt output, active low. intr is high impedance when it is not active and is driven low when an enabled interrupt event occurs. intr can be enabled if the sensor is in mcu or spi mode. in usb mode leave this pin unconnected.
preliminary solid state fingerprint sensor 6 fujitsu microelectronics america, inc. w ait (pin 29) wait output, active low. w ait is driven low when active and high-impedance when not active. w ait goes low if the a/d converter is read while an a/d conversion is in progress. w ait will remain low until the a/d conversion is completed. mosi (pin 33) spi master output/slave input. the mosi pin has a weak latch that holds the pins state when not being driven. mosi may be left unconnected in mcu mode or usb mode if not using an external serial rom. the function of this pin depends on the mode1 and mode 0 pins. mode[1:0] = 00b (microprocessor bus interface mode) mosi has no function. mode[1:0] = 01b (spi slave mode) mosi functions as the slave serial input. mode[1:0] = 10b (usb interface mode, using internal rom) mosi has no function. mode[1:0] = 11b (usb interface mode, using external rom) mosi functions as the master serial data output to the slave serial rom data input. unlike standard spi, mosi is actively drive n high and low when transmitting data and is high impedance when idle. connect a pull-up resistor between mosi and vdd to pull mosi high when idle. miso (pin 34) spi master input/slave output. the miso pin has a weak latch that holds the pins state when not being driven. miso may be left unconnected in mcu mode or usb mode if not using an external serial rom. the function of this pin depends on the mode1 and mode 0 pins. mode[1:0] = 00b (microprocessor bus interface mode) miso has no function. mode[1:0] = 01b (spi slave mode) miso functions as the slave serial data output. unlike standard spi, the miso connection is actively driven high and low when transmitting data and is high impedance when idle. connect a pull-up resistor between miso and vdd to pull miso high when idle. mode1/mode0 = 10b (usb interface mode, using internal rom) miso has no function. mode1/mode0 = 11b (usb interface mode, using external rom) miso functions as the master serial data input from the slave serial rom data output. p0 (pin 9) port output 0. this output is controlled by bit 0 of the ctrlc register. p1 (pin 10) port output 1. this output is controlled by bit 1 of the ctrlc register. dp (pin 38) usb d+ data line. in usb mode, connect a 1.5k ohm resistor between dp and vdd3, which must be between 3.3v and 3.6v in this mod e. use a 43 ohm series resistor. in mcu or spi mode, either pull-up this pin with a resistor or tie it to ground.
preliminary MBF200 fujitsu microelectronics america, inc. 7 dm (pin 37) usb d- data line. use 43 ohm series resistor. in mcu or spi mode, either pull-up this pin with a resistor or tie it to ground. mode[1:0] (pins 35 and 36) mode select pins. mode[1:0] select one of four operating modes. test (pin 8) test mode enable. it is intended for factory use only. connect this pin to vss. no connect (pins 41-80) unconnected pins. mode[1:0] description 00b microprocessor bus mode 01b spi bus mode 10b usb mode, using internal rom 11b usb mode, using external rom truth table for the microprocessor bus interface cs0 cs1 a0 rd wr mode data lines h x x x x de-selected high impedance x l x x x de-selected high impedance l h x h h standby high impedance l h l l h read index register output l h l h l write index register input l h h l h read data register output l h h h l write data register input device bus operation microprocessor bus interface the microprocessor bus interface mode uses the following pins: d[7:0], a0, rd , wr , cs0 , cs1, extint, intr , and w ait . either the internal multi-vibrator or the xtal1/xtal2 oscillator can be selected to provide the clock to the chip. the spi and usb interfaces are disabled. the ?gerprint sensor chip uses an indexed addressing scheme to access its function registers. the chip has eight data lines (d[7:0]) and one address line (a0). the address line selects between the index register and the data register. drive a0 low to select the index register. drive a0 high to access the function register selected by the index register. the index register retains its value until it is rewritten or the chip is reset. the chip has four control inputs: cs0 , cs1, rd , and wr . drive cs0 low and cs1 high to select the chip. data is latched on the rising edge of wr-. the chip has two status lines: intr and w ait . the intr signal is asserted when an interrupt event occurs. the w ait signal goes low when the a/d converter is read while an a/d conversion is in progress. the w ait signal will be high impedance when the a/d conversion is completed. both the w ait and intr outputs are high impedance when they are not active. as a result, they can be active- low wire-ored in conjunction with other interrupts or wait signals. the spi and usb interfaces are disabled when the microprocessor bus interface is selected. a truth table for the microprocessor bus interface is shown below:
preliminary solid state fingerprint sensor 8 fujitsu microelectronics america, inc. serial peripheral bus interface (spi) slave spi bus mode spi (slave) bus mode uses the following pins: sclk, scs , mosi, miso, and extint. either the internal multivibrator or the xtal1/xtal2 oscillator can be selected to provide the clock to the chip. the microprocessor bus and usb interface are disabled. spi slave mode in spi slave mode, the sensor can operate in either spi mode (0, 0) where cpol = 0 and cpha = 0 or spi mode (1, 1) where cpol = 1 and cpha = 1. the spi master may clock in commands and clock out data up to 12 mbits per second. the spi master can write and read the registers of the sensor even when the internal 12 mhz multivibrator or xtal1/xtal2 oscillator is halted. mosi bits are sampled on the rising edge of sck miso bits change on the falling edge of sck sck can be idle in either a high or low state the most signi?ant bits are shifted out ?st register read command in spi slave mode the register read command includes a command byte and address byte. the command sequence begins when the spi master drives scs low and sends the read command byte (encoded as 0x03) on the mosi pin. following the command byte, the master sends the address byte, which is the index to the register to be read. after receiving the least signi?ant bit (lsb) of the address byte, the spi slave sensor sends the contents of the selected register on the miso pin. finally, the master drives scs high after it has sampled the lsb of the data byte. when reading the a/d converter, the master may keep scs low to read consecutive pixels up to the end of the current row. a new register read command must be issued to read the next row. the spi master must drive scs high before beginning another command. register write command for spi slave mode the register write command includes a command byte and address byte followed by the data to be written. the command sequence begins when the spi master drives scs low and sends the write command byte (encoded as 0x02) on the mosi pin. then the master sends the address byte, which is the index to the register to be written. finally, the master sends the data byte and thereafter drives scs high. usb interface mode, using internal rom this usb mode uses the following pins: dp, dm, extint, xtal1, and xtal2. xtal1 must be driven from a 12 mhz source or xtal1 and xtal2 must be connected to a 12 mhz crystal circuit. the internal 12 mhz multivibrator, the microprocessor bus, and spi interface are disabled. the internal usb descriptor rom will be accessed in response to a usb get_descriptor command. the sensors usb interface uses three endpoints: endpoint 0 endpoint 0 is a control endpoint used for device enumeration and con?uration. the sensor function registers are written and read using control transfers of vendor speci? commands to endpoint 0. endpoint 1 endpoint 1 is a bulk-in endpoint speci?ally for reading the ctrla register, which is the output buffer of the a/d converter. data is transmitted in 64-byte packets except for the last packet of a getrow operation which may be 64-bytes or less, depending on the row length. endpoint 2 endpoint 2 is an interrupt endpoint. in the event of an interrupt, the contents of the isr (interrupt status register) are transfered to endpoint 2. usb interface mode, using external rom this usb mode the uses following pins: dp, dm, sclk, scs , mosi, miso, extint, xtal1, and xtal2. xtal1 must be driven from a 12 mhz source or a 12 mhz crystal circuit must be connected to xtal1 and xtal2. the internal 12 mhz multi- vibrator and the microprocessor bus are disabled. the spi interface is enabled as an spi master. the external spi serial rom will be accessed in response to a usb get_descriptor command. the internal usb descriptor rom is disabled. this mode allows an external serial rom to override the internal descriptor rom. note: when the MBF200 is directly connected to usb in either of the modes above, the vdd and vdda pins must be powered between 3.3v and 3.6v so that the MBF200 dp and dm pins do not drive the usb beyond 3.6v.
preliminary MBF200 fujitsu microelectronics america, inc. 9 spi master mode in spi master mode the sensor operates in spi mode (1,1) where cpol = 1, and cpha = 1. sck is limited to 1 mhz. mosi bits change on the falling edge of sck miso bits are sampled on the rising edge of sck sck is idle in the high state the most signi?ant bits are shifted out ?st function register descriptions the function registers are accessed by indexed addressing. write the index register to select a function register. read or write the data register to access the contents of the function register. all registers can be read and written except as noted in the following descriptions. function register map note: in the following descriptions, ?ub-image means a rectangular region of the sensor array, up to and including the entire array. rah 0x00 row address register high. reset state: 0x00 this register holds the high order bit of the address of the ?st row of a sub-image. index name description read/write access 0x00 rah row address, high r/w 0x01 ral row address, low r/w 0x02 cal column address, low r/w 0x03 reh row address end, high r/w 0x04 rel row address end, low r/w 0x05 cel column address end, low r/w 0x06 dtr discharge time register r/w 0x07 dcr discharge current register r/w 0x08 ctrla control register a r/w 0x09 ctrlb control register b r/w 0x0a ctrlc control register c r/w 0x0b sra status register a r 0x0c pgc programmable gain control register r/w 0x0d icr interrupt control register r/w 0x0e isr interrupt status register r/w 0x0f thr threshold register r/w 0x10 cidh chip identi?ation, high r 0x11 cidl chip identi?ation, low r 0x12 tst test mode register r/w bit number bit name function [7:1] - reserved. write 0 to these bits. 0 ra[8] most signi?ant bit of row address register
preliminary solid state fingerprint sensor 10 fujitsu microelectronics america, inc. ral 0x01 row address register low. reset state: 0x00 this register holds the low order byte of the address of the ?st row of a sub-image. cal 0x02 column address register. reset state: 0x00 this register holds the address of the ?st column of a sub-image. reh 0x03 row address end register high. reset state: 0x00 this register holds the most signi?ant bit of the address of the last row of a sub-image. rel 0x04 row address end register low. reset state: 0x00 this register holds the least signi?ant byte of the address of the last row of a sub-image. cel 0x05 column address end register. reset state: 0x00 this register holds the address of the last column of a sub-image. bit number bit name function [7:0] ra[7:0] low eight bits of row address register bit number bit name function [7:0] ca[7:0] column address register bit number bit name function [7:1] - reserved. write 0 to these bits. 0 rend[8] most signi?ant bit of row address register bit number bit name function [7:0] rend[7:0] low eight bits of row address register bit number bit name function [7:0] cend[7:0] column address register
preliminary MBF200 fujitsu microelectronics america, inc. 11 dtr 0x06 discharge time register reset state: 0x00 dcr 0x07 discharge current register reset state: 0x00 ctrla 0x08 control register a. reset state: 0x00 write this register to initiate image conversion. read this register to read the a/d converter. the getsub, getimg, and getrow bits select an image access mode and initiate an a/d conversion sequence. the ainsel bit selects the input source to the a/d converter. set the getsub bit to initiate the capture of a rectangular sub-image de?ed by the rah, ral, cal, reh, rel, and cel registers. in cpu or spi mode, the sub-image can be an arbitrary rectangle ranging from a single pixel to the entire array. in usb mode, t he number of columns in the sub-image must be an integral multiple of 64. set the getimg bit to initiate the capture of a whole image starting from row zero and column zero through row 299 and column 2 55, regardless of the rah, ral, cal, reh, rel, and cel registers. set the getrow bit to initiate the capture of a row speci?d by the rah and ral registers. writing a 1 to any of getsub, getimg, or getrow abandons the current image access operation and restarts at the beginning of th e sub-image, image, or row. set at most one of these three bits. if more than one these three bits are set, image conversion will not start. bit number bit name function [7] - reserved. write 0 to these bits. [6:0] dt[6:0] sets the discharge time in oscillator clock periods. bit number bit name function [7:5] - reserved. write 0 to these bits. [4:0] dc[4:0] sets the discharge current rate. bit number bit name function 7 - reserved. write 0 to this bit. 6 - reserved. write 0 to this bit. 5 - reserved. write 0 to this bit. 4 - reserved. write 0 to this bit. 3 ainsel 0=select array for conversion 1=select external analog input pin and start conversion 2 getsub initiates auto-increment for sub-image 1 getimg initiates auto-increment for whole image 0 getrow initiates auto-increment for selected row
preliminary solid state fingerprint sensor 12 fujitsu microelectronics america, inc. setting the getrow bit causes the following events to happen: row address loaded with contents of rah and ral register. column address resets to zero row capture automatically starts analog to digital conversion of ?st pixel automatically starts setting the getimg bit causes the following events to happen: row address resets to zero column address resets to zero row capture automatically starts analog to digital conversion of ?st pixel automatically starts setting the getsub bit causes the following events to happen: row address loaded with contents of rah and ral register column address loaded with contents of cal row capture automatically starts analog to digital conversion of ?st pixel automatically starts set the ainsel bit along with one of the other three bits to begin the analog to digital conversion of the voltage on the ain p in instead of the sensor array. writing 0 to the ctrla register has no effect other than clearing ainsel; the current image access operation is not abandoned. read ctrla for the result of the a/d conversion. the rising edge of rd causes the next a/d conversion to start. note: dt[6:0] refers to the contents of the discharge time register. parameter description max units rising edge of wr to first data valid 28 + dt[6:0] clock cycles rising edge of rd to next data valid 6 clock cycles
preliminary MBF200 fujitsu microelectronics america, inc. 13 crtlb 0x09 control register b. reset state: ctrlb[7:6] = state of mode[1:0]. ctrlb[5] = 1. ctrlb [4:0] = 0, chip is disabled, oscillator is stopped. bit number bit name function [7:6] mode[1:0] re?cts the state of the mode[1:0] pins. these bits are read-only. writing to these bits has no effect. write 0 t o these bits. 5 rdy this is a read-only bit that indicates the status of the a/d converter. 0 = a/d conversion is in progress. 1 = a/d converter is idle. writing this bit has no effect. write 0 to this bit. 4 - reserved. write 0 to this bit. 3 afden set this bit to enable the automatic ?ger detection circuit. in usb mode, automatic ?ger detection will generate an interrupt on endpoint 2. in cpu or spi mode, automatic ?ger detection will generate a ?ger detect interrupt on the intr pin as controlled by the interrupt control register (icr). in any mode, the automatic ?ger detection can be combined with enable=0 to save power. 2 autoincen 0 = column and row addresses do not automatically increment after the a/d converter is read. 1 = column addresses increment and another a/d conversion is initiated after the a/d converter is read. the row address increments at the end of each column. 1 xtalsel in usb mode this bit has no function. in cpu and spi mode this bit selects the clock source for the digital logic. 0 = selects the internal 12 mhz multi-vibrator. 1 = selects the xtal1 pin. 0 enable 0 = place the sensor array, digital, and analog block into low-power state (12 mhz clock is halted, a/d converter is shut down) . 1= enable the sensor array, digital, and analog blocks (12 mhz clock and a/d converter are enabled).
preliminary solid state fingerprint sensor 14 fujitsu microelectronics america, inc. ctrlc 0x0a control register c. this register controls the behavior of general output port pins p0 and p1. reset state: 0x00 sra 0x0b status register a. read only. this register shadows the state of ctrla. reset state: 0x00 bit number bit name function [7:5] pt1[2:0] programs the toggle rate of the p1 pin. if pt1[2:0] = 000, then the p1 pin follows the state of the p1 bit. otherwise pt1[2:0] selects the clock divisor to generate a square wave on the p1 pin. 000 = p1 pin follows state of bit p1. 001 = clock divided by 2 24 . 010 = clock divided by 2 23 . 011 = clock divided by 2 22 . 100 = clock divided by 2 21 . 101 = reserved. 110 = reserved. 111 = reserved. [4:2] pt0[2:0] programs the toggle rate of the p0 pin. if pt0[2:0] = 000, then the p0 pin follows the state of the p0 bit. otherwise pt0[2:0] selects the clock divisor to generate a square wave on the p0 pin. 000 = p0 pin follows state of bit p0. 001 = clock divided by 2 24 . 010 = clock divided by 2 23 . 011 = clock divided by 2 22 . 100 = clock divided by 2 21 . 101 = reserved. 110 = reserved. 111 = reserved. 1 p1 general purpose output port. when pt1[2:0] bits are 000, this bit controls the p1 pin. 0 = p1 pin low. 1 = p1 pin high. 0 p0 general purpose output port. when pt0[2:0] bits are 000, this bit controls the p0 pin. 0 = p0 pin low. 1 = p0 pin high. bit number bit name function 7 - reserved. returns 0. 6 - reserved. returns 0. 5 - reserved. returns 0. 4 - reserved. returns 0. 3 ainsel this bit is set or cleared when the ainsel bit (ctrla bit 3) is set or cleared by software. 2 getsub this bit is set when the getsub bit (ctrla bit 2) is set by software. this bit is cleared after the last byte is read. 1 getimg this bit is set when the getimg bit (ctrla bit 1) is set by software. this bit is cleared after the last byte is read. 0 getrow this bit is set when the getrow bit (ctrla bit 0) is set by software. this bit is cleared after the last byte is read.
preliminary MBF200 fujitsu microelectronics america, inc. 15 pgc 0x0c programmable gain control register. reset state: 0x00 icr 0x0d interrupt control register. reset state 0x00. this register controls the behavior of the two interrupt sources of the ?gerprint sensor. interrupt request 0 corresponds to t he ?ger detect interrupt. interrupt request 1 corresponds to the external interrupt pin extint. set bits ie[1:0] to enable the corresponding interrupt. disabling an interrupt prevents the interrupt event from causing the ch ip to assert intr or to send a packet on usb endpoint 2. however, the interrupt event is not prevented from setting its corresponding bit in the isr register. set bits im[1:0] to prevent an interrupt event from setting the corresponding bit in the isr. setting or clearing im[1:0] will not clear isr bits ir[1:0]. set bits it[1:0] to program the interrupts as edge or level sensitive. if it1 is programmed as edge triggered, then ir1 (interr upt request 1) will be set by the falling edge of extint. ip[1:0] select the polarity of the interrupt source. to detect ?ger down and ?ger up states with the internal ?ger detect ci rcuit, set the ip0 bit to detect ?ger down (rising or high signal). after the ?ger down interrupt occurs, clear the ip0 bit to detect ?ger up ( falling or low signal). similarly, ip1 can be programmed to select the polarity of the extint signal. bit number bit name function [7:4] - reserved. write 0 to these bits. returns 0 when read. [3:0] pg[3:0] sets the gain of the ampli?r. 0000 = 1.0 (default) 0001 = 0.25 0010 = 0.50 0011 = 0.75 0100 = 1.0 0101 = 1.25 0110 = 1.50 0111 = 1.75 1000 = 4.0 1001 = 1.0 1010 = 2.0 1011 = 3.0 1100 = 4.0 1101 = 5.0 1110 = 6.0 1111 = 7.0
preliminary solid state fingerprint sensor 16 fujitsu microelectronics america, inc. isr 0x0e interrupt status register. reset state isr[7:2] = 0. isr[1:0] = x. state is indeterminate after reset. read this register to determine source(s) of interrupt(s). write a 1 to ir[1:0] to acknowledge and clear the corresponding interrupt bit. bits is[1:0] re?ct the state of the ?ger detect sensor and the extint pin, regardless of the bit settings in the icr register . when the ?ger detect sensor is not triggered, the is0 bit will be constantly low. however the is0 bit may not be constantly high when a ?ger is present; the bit may be repeatedly changing from a low to high state. thr 0x0f threshold register. reset state 0x00. this register controls the threshold at which a ?ger is detected by the automatic ?ger detection circuit. bit number bit name function 7 ip1 0=extint interrupt polarity is falling edge or active low 1=extint interrupt polarity is rising edge or active high 6 ip0 0=finger detect interrupt polarity is falling edge or active low 1=finger detect interrupt polarity is rising edge or active high 5 it1 0=extint interrupt is edge triggered 1=extint interrupt is level triggered 4 it0 0=finger detect interrupt is edge triggered 1=finger detect interrupt is level triggered 3 im1 0=extint interrupt not masked 1=extint interrupt masked 2 im0 0=finger detect interrupt not masked 1=finger detect interrupt masked 1 ie1 0=extint interrupt disabled 1=extint interrupt enabled 0 ie0 0=finger detect interrupt disabled 1=finger detect interrupt enabled bit number bit name function [7:4] - reserved. write 0 to these bits. returns 0 when read. 3 is1 re?cts the state of the extint pin. write 0 to this bit. 2 is0 re?cts the state of the finger detect sensor. write 0 to this bit. 1 ir1 extint interrupt request pending. 0 ir0 finger detect interrupt request pending. bit number bit name function 7 - reserved. write 0 to this bit. [6:4] thv[2:0] threshold voltage level. [3:0] thc[3:0] sharing capacitor size.
preliminary MBF200 fujitsu microelectronics america, inc. 17 cidh 0x10 chip identi?ation register high. this register holds the high order byte of the chip identi?ation word. cidl 0x11 chip identi?ation register low. this register holds the low order byte of the chip identi?ation word. tst 0x12 test mode register. reserved for factory use only. reset state 0x00. bit number bit name function [7:0] cidh[7:0] returns 0x20 when read. bit number bit name function [7:0] cidl[7:0] the return value depends on the revision of the chip. bit number bit name function [7:0] tst[7:0] reserved. write only 0 to these bits.
preliminary solid state fingerprint sensor 18 fujitsu microelectronics america, inc. sensor initialization the sensor should be enabled and its image parameters adjusted before beginning a getimg, getrow, or getsub operation. image retrieval microprocessor interface get row first load the rah and ral registers with the address of the row to be fetched. then write the ctrla register to initiate a getrow operation. finally, read the ctrla register 256 times to retrieve the row data. wait 30 s. write ctrlb with bits 2 and 0 set. sensor enabled. other registers (dtr and dcr for example) can be initialized during this time. if using an external clock, then set bit 1 also. enable adc write dcr. write dtr. parameters adjusted. write pgc. adjust parameters write rah. write ral. row selected. set row address high order bit. set row address low order byte. setup row address (mcu mode) write ctrla with 0x01. wait row capture time. read ctrla. last cell of row was read? wait a/d conversion time. row captured. yes no getrow (mcu mode)
preliminary MBF200 fujitsu microelectronics america, inc. 19 get whole image no row or column registers need to be loaded prior to starting a getimg operation. the sensor will automatically begin a/d conv ersion at row zero, column zero. write ctrla with 0x02. wait row capture time. read ctrla. last cell of row was read? wait a/d conversion time. image captured. yes no last cell of image was read? yes no image capture (mcu mode)
preliminary solid state fingerprint sensor 20 fujitsu microelectronics america, inc. get sub-image first, load the rah, ral, and cal registers with the starting row and column address of the sensor sub-region. then load regist ers reh, rel, and cel with the ending row and column address of the sensor sub-region. write the ctrla register to initiate a getsub ope ration. finally, read ctrla register until the sub-image has been retrieved. the rah, ral, cal, reh, rel, and cel registers do not have to be loaded before each getimg operation unless a different sensor sub0region is to be captured. write rah. write ral. set starting row address, high order bit. set starting row address, low order byte. sub region selected. write cal. write reh. write rel. write cel. set starting column address. set ending row address, high order bit. set ending row address, low order byte. set ending column address. setup sub region (mcu mode) write ctrla with 0x04. wait row capture time. read ctrla. last cell of row was read? wait a/d conversion time. image captured. yes no last cell of image was read? yes no get sub image (mcu mode)
preliminary MBF200 fujitsu microelectronics america, inc. 21 serial peripheral interface the ?et image, ?et sub-image, and ?et row operations are initiated by writing the same registers as described in the micr oprocessor interface, except that the commands are written to the mosi pin and the data is read back on the miso pin. however, in spi mode , an image or sub-image cannot be retrieved by issuing a single register read command and shifting in the entire image; a separate registe r read command must be issued prior to reading each row. get image converted last cell of image? image captured. drive scs- low. send write opcode. send ctrla address. send data 0x02. drive scs- high. drive scs- low. wait row capture time. send read opcode. send ctrla address. converted last cell of row? read data. no drive scs- high. yes no yes image capture (spi mode)
preliminary solid state fingerprint sensor 22 fujitsu microelectronics america, inc. usb interface the ?et image, ?et sub-image, and ?et row operations are initiated by writing the same registers as described in the micr oprocessor interface, except that the registers are written and read on endpoint 0 and the image data is read from endpoint 1. get image at endpoint 0, write ctrla with 0x02. from endpoint 1, read 64-byte packet. final packet of image was read? image captured. yes no image capture (usb mode)
preliminary MBF200 fujitsu microelectronics america, inc. 23 absolute maximum ratings stresses above those listed under absolute maximum ratings may cause permanent device failure. functionality at or above these limits is not implied. exposure to absolute maximum ratings for extended periods may affect device reliability . operating range dc characteristics (vdd=5.0v) (vdd=3.3v) symbol rating value unit v dd power supply voltage +7.0 v v in , v out voltage on any pin relative to vss -0.5v to +7.0v v i out output current per i/o 8.0 ma t stg storage temperature -65? to +150? ? symbol description min max unit v dd supply voltage 3.3 5.5 v usb mode 3.3 3.6 v t a ambient temperature 0? 60? ? symbol description test conditions min max units v il input low voltage vdo = 4.5v -0.5 0.8 v v ih input high voltage 2.0 vdd v v ol output low voltage vdd = min, iol = 8 ma - 0.4 v v oh output high voltage vdd = min, ioh = -4 ma 2.4 - v i li input leakage current vdd = max, vin = vss to vdd -5.0 5.0 ? i lo output leakage current vdd = max, vout = vss to vdd, ce0- = vih or ce1 = vil -5.0 5.0 ? symbol description test conditions min max units v il input low voltage vdd = 3.0v -0.5 0.6 v v ih input high voltage 2.0 vdd v v ol output low voltage vdd = 3.6v, iol = 4 ma - 0.4 v v oh output high voltage vdd = 3.0v, ioh = -2 ma 2.4 - v i li input leakage current vdd = 3.6v vin = vss to vdd -5.0 5.0 ? i lo output leakage current vdd = 3.6v, vout = vss to vdd, ce0- = vih or ce1 = vil -5.0 5.0 ?
preliminary solid state fingerprint sensor 24 fujitsu microelectronics america, inc. power supply consumption symbol description test conditions typ max units (microprocessor mode, vdd=5.0v f osc = 20mhz) i dd digital current, dynamic tbd 5 ma i ddsb digital current, standby tbd 1 ma i ddpdf digital current, power down with auto finger detection enabled tbd 10 ? i ddpd digital current, power down tbd 10 ? i dda analog current, dynamic tbd 20 ma i ddasb analog current, standby tbd 12 ma i ddapdf analog current, power down with auto finger detection enabled tbd 200 ? i ddapd analog current, power down tbd 10 ? (spi slave mode, vdd=5.0v) i dd digital current, dynamic tbd 5 ma iddsb digital current, standby tbd 1 ma i ddpdf digital current, power down with auto finger detection enabled tbd 10 ? i ddpd digital current, power down tbd 10 ? i dda analog current, dynamic tbd 20 ma i ddasb analog current, standby tbd 12 ma i ddapdf analog current, power down with auto finger detection enabled tbd 200 ? i ddapd analog current, power down tbd 10 ? (microprocessor mode, vdd=3.3v) i dd digital current, dynamic tbd 5 ma i ddsb digital current, standby tbd 1 ma i ddpdf digital current, power down with auto finger detection enabled tbd 10 ? i ddpd digital current, power down tbd 10 ? i dda analog current, dynamic tbd 15 ma i ddasb analog current, standby tbd 8 ma i ddapdf analog current, power down with auto finger detection enabled tbd 200 ? i ddapd analog current, power down tbd 10 ? (spi slave mode, vdd=3.3v) i dd digital current, dynamic tbd 5 ma i ddsb digital current, standby tbd 1 ma i ddpdf digital current, power down with auto finger detection enabled tbd 10 ? i ddpd digital current, power down tbd 10 ? i dda analog current, dynamic tbd 15 ma i ddasb analog current, standby tbd 8 ma i ddapdf analog current, power down with auto finger detection enabled tbd 200 ? i ddapd analog current, power down tbd 10 ?
preliminary MBF200 fujitsu microelectronics america, inc. 25 ac characteristics microprocessor bus mode read cycle write cycle (usb mode, vdd=3.3v) i dd digital current, dynamic tbd 5 ma i ddsb digital current, standby tbd 1 ma i ddpdf digital current, power down with auto finger detection enabled tbd 10 ? i ddpd digital current, power down tbd 10 ? i ddspf digital current, usb suspend with auto finger detection enabled tbd 10 ? i ddsp digital current, usb suspend tbd 10 ? i dda analog current, dynamic tbd 30 ma i ddasb analog current, standby tbd 20 ma i ddapdf analog current, power down with auto finger detection enabled tbd 200 ? i ddapd analog current, power down tbd 10 ? symbol description min max units t acc address to output delay 5 35 ns t ce chip select to output delay 5 35 ns t oe read enable to output delay 5 35 ns t oh output hold time from address, cs0 , cs1, or rd , which ever occurs ?st 5 - ns t df rd high to output high z - 10 ns t df cs0 high or cs1 low to output high z - 10 ns symbol description min max units t as address setup to wr low 0 - ns t cs cs0 setup to wr low 0 - ns t cs cs1 setup to wr low 0 - ns t ah address hold time from wr high 5 - ns t ch cs0 hold time from wr high 0 - ns t ch cs1 hold time from wr high 0 - ns t wp wr pulse width low 10 - ns t wph wr pulse width high 10 - ns t ds data setup time to wr low 8 - ns t dh data hold time to wr high 0 - ns power supply consumption (continued) symbol description test conditions typ max units
preliminary solid state fingerprint sensor 26 fujitsu microelectronics america, inc. spi slave mode spi master symbol description min max units f sck sclk clock frequency - 12 mhz t css scs setup time 40 - ns t csh scs hold time 40 - ns t wl sclk low 40 - ns t wh sclk high 40 - ns t cs scs high time 40 - ns t su data-in setup time 20 - ns t h data-in hold time 20 - ns t v data-out valid time 20 30 ns t hd data-out hold time 0 - ns t dis data-out disable time - 100 ns symbol description min max units f sckm sclk clock frequency - 2 mhz t cssm scs setup time 250 - ns t cshm scs hold time - 250 ns t wlm sclk low - 250 ns t whm sclk high - 250 ns t csm scs high time - 250 ns t sum data-in setup time - 100 ns t hm data-in hold time - 250 ns t vm data-out valid time - 200 ns t hdm data-out hold time - 200 ns t dism data-out disable time - 300 ns
preliminary MBF200 fujitsu microelectronics america, inc. 27 timing diagrams figure 1. microprocessor mode read cycle d[7:0] a0 cs1 cs0 rd t acc t oe t ce wr t df t oh
preliminary solid state fingerprint sensor 28 fujitsu microelectronics america, inc. figure 2. microprocessor mode write cycle figure 3. spi slave mode timing d[7:0] a0 cs1 cs0 rd wr t as t wp t ah t wph t cs t ds t ch t dh scs sck mosi miso t css t wl t wh t csh t cs t h t su t v t hd t dis data in data out for read operations only.
preliminary MBF200 fujitsu microelectronics america, inc. 29 figure 4. spi slave mode read operation figure 5. spi slave mode write operation figure 6. spi master timing d4 scs sck mosi miso address stage 0 00 x0 1 a4 a3 a2 a1 a0 10 0 0 d7 d6 d5 d1 d0 d3 d2 command stage data stage data out 0 op code op code register address don't care x scs sck mosi miso address stage 0 00 x0 1 a4 a3 a2 a1 a0 0 0 0 0 d7 command stage data stage 0 op code op code register address data in d4 d6 d5 d1 d0 d3 d2 high impedance scs sck mosi miso t cssm t wlm t whm t cshm t csm t hm t sum t vm t hdm t dism data out data in
preliminary solid state fingerprint sensor 30 fujitsu microelectronics america, inc. figure 7. spi master read operation d0 scs sck mosi miso address stage 0 00 00 1 a7 a6 a5 a4 a3 1 d7 d6 d6 d0 d7 command stage data stage data in 0 op code op code rom address a2 a1 a0
preliminary MBF200 fujitsu microelectronics america, inc. 31 physical dimensions
preliminary solid state fingerprint sensor 32 fujitsu microelectronics america, inc. recommended land pattern note: dimensions are in inches (mm) symbol description dimension n pin count 80 a tip to tip dimension 1.074 (27.30) p pitch .0197 (.50) l pad length .065 (1.65) w pad width .012 (.30) p a 140 l w detail z see detail z full radius typical
preliminary MBF200 fujitsu microelectronics america, inc. 33 array orientation pin 40 pin 1 pin 41 pin 80 MBF200 (0, 0) (255, 0) (0, 299) (255, 299)
preliminary solid state fingerprint sensor 34 fujitsu microelectronics america, inc. appendix a recommended power and ground connections the following describes the recommended method for reducing image noise to get the best image from the sensor. vdda1 (pin 1) and vdda2 (pin 7) are the analog power supply pins. vssa1 (pin 2) and vssa2 (pin 6) are the ground returns. connect one bulk capacitor (4.7? to 10?) and two 0.1? capacitors in parallel between analog power and ground to provide ?tering of low and high frequency noise. place the bulk capacitor near vdda1. separate vdda1 and vdda2 from the digital power pins through a 10 ohm resistor. vdd1 (pin 16), vdd2 (pin 25), and vdd3 (pin 39) are the digital power supply pins. vss1 (pin 15), vss2 (pin 24), and vss3 (pin 40) are the ground returns. place 0.1? capacitors between digital power and ground, as close to the pins as possible. input signals that are to be tied high should not be shorted directly to vdd, but connected through a 1k to 10k ohm resistor in order to maximize esd immunity of the sensor. a single resistor may be used for all inputs that are tied high. vss3 vdd3 vdd2 vss2 vdd1 vss1 vdda2 vssa2 vssa1 vdda1 vdd 10 ? 0.1 f 0.1 f 0.1 f 0.1 f 0.1 f 4.7 to 10 f 1 2 6 7 15 16 24 25 39 40
preliminary MBF200 fujitsu microelectronics america, inc. 35 appendix b recommended MBF200 sensor orientation mount the MBF200 such that pins 1 through 40 point away the user and pins 41 through 80 point toward from the user. when a ?ger is placed on the sensor, the tip of the ?ger should be near pins 1 through 40, the cuticle should be centered over the sensor, and the knuckle should be near pins 41 through 80. this orientation ensures that ?gerprint images will be captured right-side up, not sideways nor upside down, using fujitsus standard software. the sensor should be mounted ?sh with the surrounding surface to allow the ?ger to rest ?t on the sensor surface and increase the contact area between the ?ger and the sensor. if the sensor is recessed too deeply, only the tip of the ?ger will be imaged. it is also recommended that there be a groove or channel to guide the ?ger into the proper position so that images are captured with a uniform orientation. pin 1 pin 40 pin 41 pin 80
preliminary fujitsu microelectronics america, inc. corporate headquarters 3545 north first street, san jose, california 95134-1804 tel: (800) 866-8608 fax: (408) 922-9179 e-mail: fmacrc@fma.fujitsu.com web site: http://www.fma.fujitsu.com ?001 veridicom, inc. all rights reserved. all company and product names are trademarks or registered trademarks of their respective owners. printed in u.s.a. bms-ds-20886-10/2001

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